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Fiche profil de contrat au CRI de Lille1
Ingénieur de recherche développement
Durée : 1 avril ou 2 mai au 30 septembre 2010
Niveau de formation : bac+5 minimum
BAP E : Informatique, statistique et calcul scientifique
Emploi-type : expert système réseau
Fonction : chef de projet
Rémunération nette : 1564 €/ mois.
*Mission *
- Responsabilité de l'évolution et du bon fonctionnement du site de
grille de calcul du CRI.
- Prise en charge et mise en œuvre des systèmes informatiques dans le
contexte de la grille.
*Activités *
* Réaliser la connexion du cluster nouvellement installé au CRI à la
grille européenne EGEE,
* Assurer le bon fonctionnement du nœud en utilisant les
technologies de la grille,
* Développer et implémenter les systèmes informatiques,
* Assurer la veille technologique, définir l'évolution du matériel
et préparer le cahier des charges pour les investissements 2010,
* Traiter les incidents,
* Rédiger la documentation.
*Compétences *
* Connaissance approfondie des systèmes LINUX et des réseaux,
* Bonne pratique des langages de programmation et de script,
notamment shells Unix, Perl, Python, Java,
* Maitrise des concepts et techniques d'architectures système,
stockage et réseau,
* Connaissance des techniques et des outils utilisés dans les
grilles de calcul,
* Sens relationnel et capacité à travailler en équipe,
* Très bonne maîtrise de l'anglais écrit
*Contexte *
*Le Centre de Ressources Informatiques* (CRI) de Lille1 est un service
informatique d'environ 45 personnes. Le *CRI** *implante et gère
l'ensemble des moyens informatiques d'intérêt collectif de
l'établissement. Il propose de nombreux services aux étudiants et
personnels de l'établissement.
La personne recrutée travaillera avec l'ingénieur chargé du calcul
intensif et l'ingénieur système chargé de l'installation du nœud de grille.
Ce contrat se terminera le 30 septembre 2010 mais il pourrait avoir un
prolongement au CRI si le candidat se présente au concours sur le poste
E1E25 ouvert en 2010 sur un profil différent de celui-ci.
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Post-Doctoral Position : GRID simulation campaigns management et supervisions over a GRID middleware and architecture.
Work description
The USS SIMGRID project plans to manage large GRID simulations, as well of execution time, size of the system, and parameter sweep. In this work, we manage more specially simulations execution over GRID, and aims to run GRID simulations over a GRID.
In order to execute and manage such simulations, we need to design a specific solution, able to cope with the different components of the simulation : the GRID environment (i.e.Grid 5000, local network), the grid middleware (i.e. DIET, Confiit, APST …), the simulator (i.e. SimGRID, DASOR …). The first part of the conception of the campaign manager solution is now complete : we studied the available grid solutions and collected some user experiments feedback. According to those information, we now design the campaign manager. This campaign manager will be the glue between the different part mentions above. It aims to manage the different phases of the simulation : the middleware deployment, the simulator execution management, results collection, and the inter-active simulation driving.
The main task of this postdoc is to design the general campaign manager architecture, in order to obtain a generic solution, able to drive simulations over different platforms, with different middlewares and different simulators. This includes theoretical approach, software design and experiments.
The candidate will have a strong background in software engineering, specially in java applications design, and applications development over GRID platforms. The work will be located at CreSTIC laboratory, University Of Reims Champagne-Ardenne, will be part of the ANR-funded project "USS-SimGrid".
This position is scheduled to start as soon as possible.
Contact :
Olivier Flauzac
olivier.flauzac@univ-reims.fr
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Best Regards.
.Yves.
--
Yves Caniou
Associate Professor at Université Lyon 1,
Member of the team project INRIA GRAAL in the LIP ENS-Lyon,
Délégation CNRS in Japan French Laboratory of Informatics (JFLI),
* in Information Technology Center, The University of Tokyo,
2-11-16 Yayoi, Bunkyo-ku, Tokyo 113-8658, Japan
tel: +81-3-5841-0540
* in National Institute of Informatics
2-1-2 Hitotsubashi, Chiyoda-ku, Tokyo 101-8430, Japan
tel: +81-3-4212-2412
http://graal.ens-lyon.fr/~ycaniou/
#------------------------------------------------------------------------------------------
15- Design and study of green aspects in parallel resources simulation for
scheduling in distributed platforms - GRAAL
Type de poste : Post-doctorant
Lieu de travail : Lyon
Thème de recherche : Algorithmique, programmation, logiciels et architectures
Projet : GRAAL
Environment
Yves Caniou - yves.caniou@ens-lyon.fr
Research team name: GRAAL
Research domain: Networks, Systems and Services, Distributed Computing
Research theme: Algorithms and Scheduling for Distributed Heterogeneous
Platforms
This position is offered at the "Rhone-Alpes" Research Unit of INRIA, located
near Grenoble and Lyon.
The Unit includes more than 700 people, within 34 research teams and 10
support services.
Deadline for applications: 21/03/2010.
Monthly salary after taxes : 2127.64 € (medical insurance included)
Note: recommendation letters can be sent separetely from the application file,
to: recrutpostdoc@inrialpes.fr
Activities
Context:
Financial cost and carbon footprint are central to research issues concerning
High Performance Computing and its network aspects. Hence last technologies
bring for example processors able to vary their frequency speed in order to
consume less power directly (at processor level) and indirectly (at the air
conditioning level of a machines room for example).
On another level, researches are leaded to develop batch reservation systems
able to dynamically turn on and off resources, and dynamically reduce their
speed, in function of the load of the parallel machine they manage.
In parallel, studies on scheduling in distributed systems require simulation
tools implementing models the closest to reality in order to replay
experiences in the same conditions to confront approaches, analyze behaviors
and compare results that we cannot study and/or quantify in purely
theoretical.
State of Art:
Simgrid is a distributed platform simulator implementing several layers and
models for simulation (processors and network). With the module Simbatch, we
have extended the functionalities of Simgrid, making possible to simulate
parallel resources and their batch manager for study of cluster scheduling
issues as well as distributed scheduling issues at Grid level.
In parallel, carbon footprint measures have been taken on the Grid'5000 site
of Lyon by a research team of Lyon. Models are also studied, both on the
consumption of a on/off status change of a machine (stop, hibernate, etc.)
and on frequency modulation by teams in Lyon and Toulouse, in order to
integrate such mechanisms in OAR, the batch manager developed in Grenoble,
which is deployed on each site of Grid'5000.
Subject:
The main objective of this work is to study, adapt and implement energy
consumption models in the parallel resources simulator Simbatch.
Scheduling and re-scheduling based on green metrics, which follow actual work
in progress in the team, will be conducted and used to validate the
simulator.
Skills and profile
The candidate is expected to have knowledge on distributed platforms,
computing Grid and on scheduling in heterogeneous distributed platforms.
Candidates with experiences in Simgrid and Simbatch will be favored.
Additional information
http://graal.ens-lyon.fr/~ycaniou/
https://www.grid5000.fr/mediawiki/index.php/Special:G5KPublications
#--------------------------------------------------------------------------
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Le profil recherche est très ouvert sur les thématiques de toutes les
équipes du laboratoire.
Personnes à contacter :
* Enseignement :
o Jacques Mossière (Jacques.Mossiere@grenoble-inp.fr, 04 76827 63)
o Sébastien Viardot (Sebastien.Viardot@grenoble-inp.fr, 04 76827278)
* Recherche :
o Nicolas Halbwachs (Nicolas.Halbwachs@imag.fr, 04 56 52 03 55)
o Yassine Lakhnech (Yassine.Lakhnech@imag.fr)
o Florence Maraninchi (Florence.Maraninchi@imag.fr)
o Oded Maler (Oded.Maler@imag.fr)
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Nouveaux enjeux de la programmation mathématique pour les problèmes linéaires en nombres entiers multi-objectif
De nombreux problèmes rencontrés quotidiennement dans divers domaines (transport, télécommunication, économie ...) peuvent être modélisés sous la forme de programmes linéaires en nombres entiers et sont étudiés dans le cadre de l'optimisation combinatoire. De nombreuses méthodologies, exactes ou approchées, ont été proposées et il est aujourd'hui possible de résoudre des problèmes de taille conséquente.
Par ailleurs, la prise en compte simultanée de plusieurs objectifs contradictoires est de plus en plus considérée et forme l'objet d'étude de l'optimisation combinatoire multi-objectif. Les méthodes pour l'optimisation multi-objectif ont connu un intérêt croissant ces vingt dernières années. Cependant, le domaine de recherche a tendance à s'enliser, privilégiant des méthodes basées sur les méta-heuristiques tels que les algorithmes évolutionnaires. Alors que l'on recense des centaines d'études dédiées aux algorithmes évolutionnaires multi-objectif, le nombre portant sur les méthodes exactes multi-objectif est de l'ordre de la dizaine.
Ainsi, un effort reste à fournir pour amener les méthodes multi-objectif au même niveau d'utilisabilité et de performance que les méthodes en optimisation classique, et ainsi développer l'adoption et l'utilisation de l'optimisation combinatoire multi-objectif, en leur permettant de s'attaquer à des problèmes réalistes de grande taille.
Le projet de cette thèse sera d'explorer l'adaptation et l'élaboration de techniques, notamment des méthodes exactes comme les algorithmes de séparations et coupes et des heuristiques mathématiques comme la méthode de branchement local, utilisant la programmation mathématique pour l'optimisation multi-objectif, en se focalisant sur les problèmes linéaires en nombres entiers et plus particulièrement les problèmes en variables 0-1.
Des compétences en développement informatique (C/C++) et dans l'utilisation d'outils d'optimisation comme CPLEX sont souhaitées mais non nécessaires. Des compétences en optimisation combinatoire sont aussi un plus.
Merci à tout candidat de faire parvenir un CV, le relevé de notes de M1, les notes disponibles de M2 et une lettre de motivation.
===============================================
* Encadrant : Nicolas Jozefowiez
* Contact : nicolas.jozefowiez_at_laas.fr
* Lieu : LAAS-CNRS - Toulouse
* Durée : 3 ans (plein temps) débutant en Octobre 2010
* Rémunération : Allocation de recherche ministérielle
* Mots-clés : Recherche opérationnelle, optimisation combinatoire multi-objectif, méthodes exactes, programmation linéaire en nombres entiers
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Please disseminate the following Post-doc position to your colleagues and phd students that could be interested.
This position is at INRIA DART group.
http://www.inria.fr/lille/scientific-research/research-teams/DART_page
=== POST-DOC POSITION AVAILABLE ====
Title of the proposal: Efficient Resource Utilization in Dynamically Reconfigurable Multi-processor Embedded Systems
Keywords: Reconfigurable (FPGA) Systems, Partial and dynamic reconfiguration, programming/execution model, Multi-cores, Embedded architectures, energy/power consumption saving.
Author of the proposal: Jean-Luc Dekeyser, Smail Niar, Samy Meftali
Supervisor of the Post-doc: Jean-Luc Dekeyser, Smail Niar, Samy Meftali
Team-Project: DART
Location: LILLE
Scientific context:
The computing industry is trying to improve embedded system performances with parallel execution and reconfigurability[1][2]. If the trend towards the use of multi-cores systems does not need to demonstrate, the use of reconfigurable circuits (RC) is much more recent. This solution represents an alternative to GPPs and ASICs as it offers a good compromise between the GPP flexibility and ASICs performances. Thanks to the technological evolution, the number of logical cells has strongly augmented. The recent Virtex6 Xilinx FPGA family for instance contains 6 times more logical elements and DSPs than the VirtexII family [3] designed 6 years ago, all with a 60% power consumption reduction. According to the ITRS [2] this tendency will grow in the coming years. It will be then possible over the years to put on a RC, hundreds of processors with their interconnection network [4][5].
Another benefit in the use of RCs is their ability to offer partially and dynamic reconfiguration. In the area of MPSoC, this feature can be used to add specialized computing cores on the FPGAs function of the application parameters and running conditions. FPGA flexibility thus allows programmers to reconfigure them as needed. Consequently, multiple low-frequency heterogeneous cores and IPs can be used to provide further power savings by specialization. As a result, customized programmable hardware can significantly improve the execution speed with lower energy budget [6][7].
Goal:
In spite of these achievements, programming and efficient exploitation of these dynamically RC remains a painful and complicated task.
For instance in the past the vast majority of FPGA users were hardware designers with an important amount of knowledge and experience in circuit design. VHDL or Verilog are the most used languages to program these FPGA. These languages are however unfamiliar to the majority of SoC software programmers. In addition, the management of partially dynamically reconfigurable circuits with the existing tools does not allow an efficient and an easy use of the huge FPGA possibilities.
The objective of this post-doc is to collaborate in designing a methodology for a better and easy utilization of current and future FPGA hardware resources. The post doctor must lead to the proposal of a new programming and execution model specific to multi-processor architecture systems on FPGA. Heterogeneity and dynamic reconfigurability are the main features that must be taken into account.
To allow an efficient and dynamic control of the system resources, the model must define new services either at the operating system level or at the hardware level (performance monitoring unit). Through these services, it will be possible for the developer to determine at run time the state of the system and the application needs. This may correspond to application energy consumption, cache or memory activities, and workload at the NoC level, etc. On the other side, and by the using of this information, the application developer will be able to control the dynamic application deployment on the architecture.
Required skills:
Candidates must have (or are about to receive) a Ph.D. in the domain of Embedded Sw or Hw design. He/She must have a strong background either in parallel programming models or in reconfigurable embedded system design.
To apply, please visit:
Bilbiographical References:
1. 1 M.Duranton and Al., Hipeac roadmap, 2009
2. 2 www.itrs.com
3. 3 www.xilinx.com
4. 4 www.eve.com
5. 5 X.Li and O.Hammami, Fast Design Productivity for Embedded Multiprocessor through Multi-FPGA Emulation: The case of a 48-way Multiprocessor with NOC.
6. 6 R. Wain et Al., An overview of FPGAs and FPGA programming, internal technical report, CCLRC Daresbury Laboratory, 2006.
7. 7 A.Donlin, Applications, Design Tools and Low Power Issues in FPGA Reconfiguration, in “Designing Embedded Processors” book.
8. 8 V.M. Sima , K. Bertels, Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform, 2009 IEEE International Symposium on Parallel & Distributed Processing (IPDPS’09).
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The Laboratory for Computer Science at Ecole Polytechnique (Lix),
France, is inviting applications for its 2009-2010 Lix-Qualcomm
Postdoctoral Fellowship for research in computer science. This
fellowship is open to exceptional candidates across all disciplines
and teams at LIX -- and is supported by a competitive stipend.
Please share this call within your respective academic networks, and
encourage good candidates to apply.
Further information, as well as instructions for applicants, can be found
on the following URL:
http://www.lix.polytechnique.fr/fellowship/
Inquiries should be directed to fellowship@lix.polytechnique.fr
On behalf of the 2010 Lix-Qualcomm Fellowship Committee,
Thomas Clausen
--
Rabih TARRAF
PHD Student
SMILE team -LIRMM-I2S
------------------------
Université Montpellier 2
LIRMM - UMR 5506 - CC 477
161 rue Ada
*34095* Montpellier Cedex 5
France
-------------------------
Tel: 04 67 41 86 63
www.lirmm.fr
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